August 12, 2021
1975
Where did EDA come from and why was it born?
EDA: "Rigid Need" Production Tool in the Field of Electronic Design
EDA is R&D and design software used in the electronic field. The meaning of EDA is electronic design automation. From a functional point of view, it belongs to the branch of the generalized CAD/CAE software in the field of electronic design. In the electronic industry, computer-aided design replaces manual layout design. EDA is also a relatively broad concept. Design tools used in scenarios including IC design (digital IC, analog IC, FPGA), PCB design, and other electronic panel design (such as FPD design) can be classified as EDA. Among them, IC design is the field with the highest technical threshold and the largest market demand.
EDA is at the top of the semiconductor industry chain. IC design is the pre-stage of the chip production process. It is the process of transforming the design requirements of integrated circuit system, logic and performance into specific physical layouts. It mainly includes front-end design (specification formulation, detailed design, HDI coding, pre-simulation verification, Logic synthesis, static timing analysis) and back-end design (testability design, layout planning, CTS, wiring) and many other links, and each of these links requires the application of EDA tools, so EDA is also considered a semiconductor industry One of the foundations of the chain.
The application of EDA has become a rigid demand in the field of IC design. With the development of the semiconductor industry, the complexity of IC design has increased exponentially. It is no longer possible for today’s IC design companies (Design House) to completely leave the EDA tool and complete the layout design by hand; at the same time, the application of EDA can also help IC Designers can effectively improve the efficiency and accuracy of the design, thereby saving a lot of design costs. Tool, its design cost will be as high as $7.7 billion).
EDA is a typical high-threshold professional software. Most of the EDA software runs on the LINUX system instead of the Windows system. The reason is that most engineering and technology software was originally developed and used on the UNIX platform, and LINUX as a multi-user distributed system is more suitable for EDA. The price of professional technology software; EDA is also relatively high, usually the price of a complete set of tools can be as high as hundreds of thousands of dollars, but we think this is "not worth mentioning" compared with the value it can create for IC design companies.
The development of EDA has gone through three stages, from general to professional, from tools to platforms:
Primary stage (1970-1980): assisted electronic design with general CAD. With the use of general-purpose CAD software in mechanical design and other fields, electronic designers have also begun to try to replace manual drawing with CAD, and use two-dimensional graphic editing and analysis of the highly repetitive and complicated work in the PCB design process, such as layout and wiring work. CAD tools instead. At that time, EDA was actually an accessory tool for mechanical CAD, and CAD vendors such as Applicon and CALMA were the dominators of the EDA industry at that time.
Development stage (1980-1990): Professional EDA tools began to appear. The requirements for semiconductor design are gradually increasing. The requirements for EDA tools extend from basic CAD design to CAE simulation. The introduction of the circuit simulation program SPICE marks the birth of professional EDA design tools, and Mentor Graphics, Daisy and other companies also combine software and hardware The way to achieve the initial commercialization of EDA; after that, today’s EDA giants such as Synopsys and Cadence have also stepped onto the stage and reshaped the industry’s business model in a purely software manner.
Maturity stage (1990-present): The technology is basically mature, and EDA is becoming a platform. The development of high-process chips has further aggravated the complexity of each link in the IC process and the workload of internal verification of the link, and has put forward higher requirements for EDA technology. The EDA technology characterized by high-level language description, system-level simulation and comprehensive technology is basically mature. At the same time, the product form has evolved from the initial point tool to a full-process tool and design platform. The leading manufacturers have launched large-scale, platform-level EDA system.
Behind the continuous development of EDA is the promotion of Moore's Law, and the trend of industry concentration under the survival of the fittest is irreversible. Design is the pre-manufacturing link. Therefore, EDA software needs to be continuously updated and iterated with the progress of the chip manufacturing process to provide the semiconductor industry with methods and tools for designing next-generation chips. This is a great impact on the R&D strength of EDA manufacturers. Put forward very high requirements, only the head company can continue to keep up with the development speed of the industry. This has also led to the fact that after decades of survival of the fittest, today's EDA industry has shown a trend of high concentration, with most of the shares being occupied by the top three companies.
Application scenario: EDA covers the entire process of IC design
All types of IC designs are inseparable from the application of EDA. From the functional point of view, the chip can be divided into general-purpose IC (CPU, DRAM) and special-purpose IC (ASIC); from the structural point of view, it can be divided into digital IC (CPU, GPU, logic circuit), analog IC (operational amplifier, Reference voltage source, etc.) and digital-analog hybrid IC. In order to meet the design requirements of ICs with different functions and different structures, IC design can be roughly divided into full-custom and semi-custom designs in terms of implementation methods:
Fully customized IC design: Based on the transistor level, all devices and interconnection layouts are designed according to the specified function and performance requirements, and the circuit structure layout and wiring are specially optimized. It is usually used to design analog circuits and digital-analog hybrid circuits. , It is more suitable for general-purpose ICs or ASICs that require mass production, high integration, fast speed, small area, and low power consumption. Full custom IC design is more dependent on the designer's own understanding of the circuit, and EDA tools mainly play an auxiliary role in it.
Semi-custom IC design: Semi-custom design based on functional blocks of certain specifications such as gate-arrays, standard cells, programmable components, etc., generally used to design digital circuits, most digital large-scale circuits use semi-custom processes Design (Digital SoC design). The degree of standardization of semi-custom design is relatively higher, the participation of EDA tools is relatively higher, and the requirement for designers to understand the circuit is relatively lower.
EDA tools cover all aspects of fully customized and semi-custom IC design. Full-custom and semi-custom IC design requires different types of EDA tools. Full-custom IC design mainly includes circuit schematic design, circuit simulation, mask design, layout verification, tape-out and other links. The semi-custom IC design is more detailed and standardized in process, and can be divided into front-end design (from specification formulation to gate-level netlist generation) and back-end design (placement and routing, layout generation). At present, there are mature EDA companies for all aspects of full-custom and semi-custom IC design. Semi-custom IC design is relatively more dependent on EDA. At the same time, digital ICs that mainly adopt semi-custom designs also occupy more of the global semiconductor market. High share, so in the following we will mainly focus on EDA applications in the field of semi-custom digital IC design.
Detailed explanation of EDA application in semi-custom digital IC design
Semi-custom IC design can be roughly divided into front-end design and back-end design links:
Front-end design: Also known as logic design, it is mainly related to the realization of circuit logic. It uses HDL language to describe the circuit, and performs simulation verification, synthesis and timing analysis. Finally, it is converted into a gate-level netlist, including specification formulation, detailed design, HDL coding, Logic simulation verification, logic synthesis and other links.
Back-end design: Also known as physical design, it is mainly combined with the process to convert the gate-level netlist into an IC design layout (gds file, which is verified and output for the next step of IC manufacturing, including testability testing and layout planning. , Clock tree synthesis, placement and routing, layout generation, physical simulation verification and other links.
The process of semi-custom digital IC design is relatively long, and special EDA tools are required for each link. In the following, we show the whole process of semi-custom digital IC front-end design and back-end design and the mainstream EDA tools that need to be used. On the whole, digital IC design has a long link, and IC design companies usually need to configure a complete set of EDA tools to meet their needs.
Business model: software tools are basic products, but the value is far more than tools
The business model of EDA vendors is mainly based on EDA software authorization combined with IP authorization:
EDA software authorization: EDA vendors will sell various tools and software packages developed by themselves (most of the tools in each link mentioned above will be integrated into the software package to form an overall solution), and sell them in the form of software authorization. Some contracts are authorized for a period of 2-3 years, and a small number of contracts are permanent authorizations. Downstream customers are mainly medium and large IDM and Fabless companies.
IP authorization: EDA manufacturers will also directly provide chip IP authorization to customers, which are divided into soft IP (RTL coding functional block), solid IP (gate-level netlist after logic synthesis), and hard IP (mask layout). EDA vendors mainly provide soft IP and solid IP. A common practice is to integrate soft IP into EDA software; charging methods include a single license fee (License) and continuous royalties (Royalty). Most Fabless/IDM will purchase some IP cores to improve the efficiency of chip development.
The value provided by EDA vendors to customers is much more than just design tools:
One is to combine advanced technology and cooperate with Foundry's verification. Since the final output layout of EDA will be handed over to Foundry for foundry, EDA tools are inseparable from advanced technology (especially back-end tools). EDA manufacturers need to prove to Fabless customers that the layout designed by their own products can be Passed Foundry's verification and put into mass production; and Fabless only has the possibility to obtain the head Foundry foundry quota by purchasing those EDA tools that have been verified.
Second, professional services and even direct technical support. While EDA manufacturers provide customers with tools, they will also export professional consulting and training services, and even directly participate in IC design. At the same time, because EDA manufacturers themselves have accumulated a relatively deep understanding of IC design and process technology, customers often have greater demand for professional services provided by manufacturers, and even more hope to get support in terms of technical knowledge.
The leading EDA manufacturers have obvious advantages in the combination of technology and professional services. At the process level, through years of hard work in the industry, leading companies such as Synopsys and Cadence have accumulated a deep Fabless/IDM customer base on the one hand, and on the other hand, they have also established an in-depth cooperative relationship with Foundry in the head. The process has an in-depth understanding; at the service level, the employees in these leading companies are often top talents in the semiconductor field, and have the ability to directly export technical services to customers. We believe that the leading EDA company is not only leading the product and tool level, but its barriers in process and service are more stable.
What stage has the EDA industry reached?
The global EDA industry has reached a mature stage, with steady growth and leading oligopoly
The global market scale exceeds tens of billions of dollars, and the growth rate is relatively stable and volatile. According to data from the ESD Alliance, the global EDA industry market has reached 10.5 billion U.S. dollars in 2019, with a CAGR of 8% from 2015 to 2019; compared to the global semiconductor industry as a whole, the growth rate of the EDA industry is relatively stable and less volatile , The value of the global EDA industry in 2019 is approximately equivalent to 2.5% of the global semiconductor industry scale (market sales).
The global EDA market is almost occupied by the "Big Three". In 2019, the combined market share of the three leading manufacturers in the global EDA industry, Synopsys, Cadence, and Mentor Graphics, is close to 70%. These three head manufacturers have the ability to cover the full link of semi-custom and full-custom IC design. Provide customers with a complete set of IC design tools; and some growing companies mostly use point tools to cut into specific links in order to gain a certain market share.
The voice of EDA vendors in the IP licensing market is also increasing. In recent years, the IP licensing business of EDA giants has developed rapidly, and the sales method of EDA vendors with soft IP embedded in EDA software has been welcomed by customers. In 2019, Synopsys and Cadence have become the second and third largest chip IP licensing companies in the world after ARM.
The current supply and demand situation of the global EDA industry
Supply side: Leading manufacturers mainly promote overall solutions. The three leading companies in the EDA industry, Synopsys, Cadence, and Mentor Graphics, basically have corresponding EDA tools to cover all aspects of full-custom and semi-custom IC design. Each tool is "packaged" as a total solution and sold to customers ("family bucket" model). The later show uses point tools to cut into the market. Although the growing EDA manufacturers do not have the ability to cover the full design link, they can also launch distinctive point tool products for certain links and cut into some market segments.
Demand side: The head customer has strong autonomy and high service requirements. Although EDA vendors prefer to provide overall solutions, for the top Fabless/IDM, they will be more inclined to "learn from others' strengths" according to their own needs, and purchase the most suitable EDA tools for different links, rather than complete Purchase a manufacturer's product; and these heads Fabless/IDM also have strong IT capabilities, and will tend to build independent R&D platforms and combine point tools, and will also develop some EDA tools by themselves. The mid-waist customers are more accepting of the overall solution, and there is a greater demand for EDA vendors to directly provide IP authorization.
How to create the "Big Three" of the global EDA industry?
The "domination" of the "Big Three" in the EDA industry has lasted for nearly thirty years. Synopsys (SNPS.US), Cadence (CADE.US), and Mentor Graphics all started in the 1980s. Cadence began to lead the EDA industry in the 1990s. However, due to some internal problems, Synopsys gradually narrowed the gap. ; And Synopsys completed the acquisition of AvanTI in 2001, and officially surpassed Cadence to become the industry's first in 2008; Mentor Graphics has a gap in product depth and revenue scale compared to the top two leaders, and was later in 2016. Siemens acquired the entire acquisition at a price of 4.5 billion U.S. dollars.
From the perspective of product and technical characteristics, the three companies each division has its own strengths:
Synopsys: Leading in product comprehensiveness. Synopsys started from front-end design and later expanded to back-end design through the acquisition of AvanTI, leading in comprehensive strength. At present, most of the core tools (VCS, Design Complier, IC Complier) of its subsidiaries are self-developed and have undergone decades of market tests, and are superior to the other two competitors in terms of reputation and reliability.
Cadence: The strength lies in the back-end design. Cadence has a deep accumulation in the field of digital IC back-end design. At the same time, it has advantages in the field of full custom design of analog circuits and digital-analog hybrid circuits (Virtuoso platform). However, in recent years, the company's expansion of product lines has mainly relied on external acquisitions, and there are still shortcomings in subdivision links such as the convergence of complex time series.
Mentor Graphics: The strength lies in the layout and routing of the back-end, but there is a gap in the integrity and integration of the product line compared to the previous two giants, and some subdivision links have not been covered; but the company has certain advantages in the PCB design field. Advantage.
The competition barriers of the "Big Three" in the EDA industry mainly come from three levels
First, strong research and development capabilities. The three major EDA giants all attach great importance to the investment in R&D. The R&D expenses over the years have reached hundreds of millions of dollars, and the R&D expense ratio has remained above 30%, even more than 40%. Take Synopsys as an example. Among its 15,000 employees worldwide, nearly 7,000 are R&D personnel. Basically, it can be said that the EDA "Big Three" have gathered the top talents in the global EDA industry.
The "Big Three" attach great importance to the education market and lock in talents in advance through cooperation in production and research. The three leading companies have established in-depth cooperative relationships with the world's top science and engineering colleges and universities to lock in the "fresh blood" in the global EDA field from the source. Take China as an example. Synopsys has reached cooperation with top domestic universities for more than 70 years. Cadence is also actively promoting the "University Plan" in China. It has entered the campus network in advance through the establishment of joint training centers, R&D centers, and laboratories. Talents.
The second is the combination with advanced technology. In the above, we have emphasized that the combination with process is one of the core values of EDA manufacturers. EDA needs to develop a new generation of design tools based on Foundry's advanced process chip technology. It also needs to obtain Foundry's process technology certification to "prove" the usability of its products. The "Big Three" have established in-depth cooperative relations with leading Foundry such as TSMC and Samsung, and can launch tools supporting the most advanced technology and obtain certification in the first time.
The "Big Three" have achieved obvious advantages in supporting advanced manufacturing processes. Through the establishment of a deep cooperative relationship with Foundry, the head manufacturer can participate in the development of the Foundry process at an early stage, and can naturally take the lead in the development of a new generation of EDA tools that support 7nm/5nm/3nm. Take Synopsys as an example. It has participated in the early development of TSMC’s 7nm process and promoted the development of EDA/IP based on TSMC’s new process. Therefore, it can launch the process based on TSMC’s 7nm process design within a few weeks. EDA tools. In contrast, most of the remaining small and medium-sized EDA companies have difficulty establishing direct cooperation with Foundry, a leading company with advanced process technology, and are basically not competitive in the high-end EDA market.
Third, a complete product line. The products of the "Big Three" basically achieve full-process coverage of fully customized and semi-custom IC design, especially Synopsys and Cadence, which are industry leaders in multiple design link tools, and the "family bucket" they provide Toolkit products have also occupied a considerable market share (especially in the mid-waist market). The small and medium-sized manufacturers that mainly provide point tools are more "surviving in the cracks."
The "Big Three" complemented the product matrix through continuous acquisitions and acquisitions. The IC design process is complex and has many links. EDA tools for different links have certain differences in technical direction. Even leading manufacturers such as Synopsys and Cadence can hardly cover the development of all tools with their own research and development capabilities. Looking back at its development history, the leading manufacturers in the EDA industry have expanded and strengthened their product lines through continuous acquisitions and acquisitions, forming a complete EDA toolkit and technology platform.
